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Back in Chapter 23, I presented a program that performed smooth horizontal panning. Smooth horizontal panning consists of two parts: byte-by-byte (8-pixel) panning by changing the start address and pixel-by-pixel intrabyte panning by setting the Pel Panning register (AC register 13H) to adjust alignment by 0 to 7 pixels. (IBM prefers its own jargon and uses the word pel instead of pixel in much of their documentation, hence pel panning. Then theres DASD, a.k.a. Direct Access Storage DeviceIBM-speak for hard disk.)
Horizontal smooth panning works just fine, although Ive always harbored some doubts that any one horizontal-smooth-panning approach works properly on all display board clones. (More on this later.) Theres a catch when using horizontal smooth panning with the split screen up, though, and its a serious catch: You cant byte-pan the split screen (which always starts at offset zero, no matter what the setting of the start address registers)but you can pel-pan the split screen.
Put another way, when the normal portion of the screen is horizontally smooth-panned, the split screen portion moves a pixel at a time until its time to move to the next byte, then jumps back to the start of the current byte. As the top part of the screen moves smoothly about, the split screen will move and jump, move and jump, over and over. Believe me, its not a pretty sight.
|Whats to be done? On the EGA, nothing. Unless youre willing to have your users eyes doing the jitterbug, dont use horizontal smooth scrolling while the split screen is up. Byte panning is finejust dont change the Pel Panning register from its default setting.|
On the VGA, there is recourse. A VGA-only bit, bit 5 of the AC Mode Control register (AC register 10H), turns off pel panning in the split screen. In other words, when this bit is set to 1, pel panning is reset to zero before the first line of the split screen, and remains zero until the end of the frame. This doesnt allow you to pan the split screen horizontally, mind youtheres no way to do thatbut it does let you pan the normal screen while the split screen stays rock-solid. This can be used to produce an attractive streaming tape effect in the normal screen while the split screen is used to display non-moving information.
Listing 30.2 illustrates the interaction of horizontal smooth panning with the split screen, as well as the suppression of pel panning in the split screen. Listing 30.2 creates a virtual screen 1024 pixels across by setting the Offset register (CRTC register 13H) to 64, sets the normal screen to scan video data beginning far enough up in display memory to leave room for the split screen starting at offset zero, turns on the split screen, and fills in the normal screen and split screen with distinctive patterns. Next, Listing 30.2 pans the normal screen horizontally without setting bit 5 of the AC Mode Control register to 1. As youd expect, the split screen jerks about quite horribly. After a key press, Listing 30.2 sets bit 5 of the Mode Control register and pans the normal screen again. This time, the split screen doesnt budge an inchif the code is running on a VGA.
By the way, if IS_VGA is set to 0 in Listing 30.2, the program will assemble in a form that will run on the EGA and only the EGA. Pel panning suppression in the split screen wont work in this version, however, because the EGA lacks the capability to support that feature. When the EGA version runs, the split screen simply jerks back and forth during both panning sessions.
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